| PART |
Description |
Maker |
| W97AH6KB |
Four-bit prefetch DDR architecture
|
Winbond
|
| HY5DU561622DTP HY5DU561622DLTP HY5DU561622DLTP-K H |
DDR SDRAM - 256Mb
256M DDR SDRAM (268,435,456-bit CMOS Double Data Rate(DDR) Synchronous DRAM)
|
HYNIX[Hynix Semiconductor]
|
| NCP51200 |
3 Amp Source / Sink VTT Termination Regulator for DDR, DDR-2, DDR-3, DDR-4
|
ON Semiconductor
|
| HYMD532M646A6-H HYMD532M646A6-J HYMD532M646A6-K HY |
DDR SDRAM - SO DIMM 256MB
32M X 64 DDR DRAM MODULE, 0.7 ns, ZMA200
Unbuffered DDR SO-DIMM
|
HYNIX SEMICONDUCTOR INC
|
| SSTV16859DGG SSTV16859BS SSTV16859EC |
2.5 V 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM
|
NXP Semiconductors
|
| IDT72T20108 IDT72T2098 IDT72T20128 |
2.5 VOLT HIGH-SPEED TeraSync? DDR/SDR FIFO 20-BIT/10-BIT CONFIGURATION
|
IDT
|
| ICSSSTVF16859BK ICSSSTVF16859BG ICSSSTVF16859 ICSS |
DDR 13-Bit to 26-Bit Registered Buffer 复员13位至26位注册缓冲区
13:26 Register
|
Diodes, Inc.
Integrated Circuit Systems
ICS
|
| HM5425801B |
256M SSTL_2 interface DDR SDRAM(256M SSTL_2接口 DDR 同步DRAM) 256M DDR SDRAM的接口SSTL_256M SSTL_2接口的DDR同步DRAM）的
|
Hitachi,Ltd.
|
| M368L6523DUS-LB3 M381L6523DUM-LCC M381L6523DUM-LB3 |
DDR SDRAM Unbuffered Module 184pin Unbuffered Module based on 512Mb D-die with 64/72-bit Non ECC/ECC 66 TSOP-II with Pb-Free (RoHS compliant) DDR SDRAM的缓冲模84pin缓冲模块的发展为本的512Mb芯片4/72-bit非ECC /有铅ECC6 TSOP-II免费（符合RoHS
|
http://
Samsung Semiconductor Co., Ltd.
SAMSUNG SEMICONDUCTOR CO. LTD.
|
| ICS16859C ICSSSTV16859CG-T ICSSSTV16859CKLF |
SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CQCC56
DDR 13-Bit to 26-Bit Registered Buffer
|
Integrated Circuit Systems
|
| IDT72T2098L7BBI IDT72T20118L7BB IDT72T20108L7BBI I |
2.5 VOLT HIGH-SPEED TeraSync DDR/SDR FIFO 20-BIT/10-BIT CONFIGURATION
2.5 VOLT HIGH-SPEED TeraSync?/a> DDR/SDR FIFO 20-BIT/10-BIT CONFIGURATION
|
Integrated Device Technology
|
| A48P4616B |
16M X 16 Bit DDR DRAM
|
AMIC Technology
|
